A Stand{Alone ASIC for Real{Time Edge Detection

In this paper, we present a stand alone ASIC architecture for a new edge detection algorithm, which applies the absolute diierence mask (ADM). The ASIC is built of three major blocks: smoothing, edge strength, and detection and localization blocks. To allow high{ speed processing, the architecture is nely pipelined. The proposed ASIC is capable of producing one edge{ pixel every clock cycle. At a clock rate of 10 MHz, the architecture can process 30 frames per second, where the size of each frame is 640480 8{bit pixels. The ASIC was laid out and fabricated using Samsung's 0.8m double{metal CMOS process.